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Intel and Micron Announce 25nm Triple Level Cell NAND

by Brian Beeler

Intel and Micron have announced the delivery of 3-bit-per-cell (3bpc) NAND flash built on 25nm process technology. Samples are going out and full line production is expected this year.


Intel and Micron have announced the delivery of 3-bit-per-cell (3bpc) NAND flash built on 25nm process technology. Samples are going out and full line production is expected this year.

Intel 25nm TLC

The  8GB 25nm lithography stores three bits of information per cell (triple-level-cell TLC), rather than the traditional one bit (single-level cell) or two bits (multi-level cell). The result is a device more than 20 percent smaller than the same capacity 25nm MLC, which is currently the smallest single 8GB device in production today. 

“With January’s introduction of the industry’s smallest die size at 25nm, quickly followed by the move to 3-bit-per-cell on 25nm, we continue to gain momentum and offer customers a compelling set of leadership products,” said Tom Rampone, Intel vice president and general manager of Intel NAND Solutions Group. “Intel plans to use the design and manufacturing leadership of IMFT to deliver higher-density, cost-competitive products to our customers based on the new 8GB TLC 25nm NAND device.”

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