Today, Spin Memory announced a new RAM (Random-Access Memory) production technology that improves memory density (and thus capacity) by at least 20%. The company claims that some chips designs can embed up to five times more memory in the same area footprint with minimal additional wafer processing costs by adopting their new technology. Spin Memory (renamed and rebranded from Spin Transfer Technologies a few years ago) was founded in 2007. Spin Memory has been aggressively researching improvements in RAM, especially MRAM.
Today, Spin Memory announced a new RAM (Random-Access Memory) production technology that improves memory density (and thus capacity) by at least 20%. The company claims that some chips designs can embed up to five times more memory in the same area footprint with minimal additional wafer processing costs by adopting their new technology. Spin Memory (renamed and rebranded from Spin Transfer Technologies a few years ago) was founded in 2007. Spin Memory has been aggressively researching improvements in RAM, especially MRAM.
Spin is calling their new technology the Universal Selector. Spin Memory’s Universal Selector is a selective, vertical epitaxial cell transistor. According to the company, they are able to operate the cell in full depletion by using a low doping concentration. Partially because of this design feature, the Universal Selector cell can be completely electrically isolated from the silicon substrate. This isolation should reduce soft error rates in RAM chips and reduce the effectiveness of rowhammer attacks. Spin Memory says it is currently working with NASA on developing low SER and row hammer-immune DRAM (Dynamic Random-Access Memory) solutions.
Spin Memory thinks it can improve DRAM array density between 20% and a whopping 35% through its 4F2 DRAM bitcell configuration. DRAM is the same kind of memory most personal computers use. The 4F2 number should be read as a 4 with a unit of F2. F2 is a unit of measurement like nanometers, pounds, or dollars. F2 is the unit used to describe how much space each feature, or bit, takes up in a two-dimensional area. Critically, it says nothing about how tall or deep the hardware needed to store a single bit is, only it’s area. Putting it all together, a 4F2 design holds 50% more memory than a 6F2 design in the same space, assuming similar vertical stacking behavior.
For emerging memories such as MRAM (Magnetoresistive Random-Access Memory), ReRAM (Resistive Random-Access Memory), and PCRAM (Phase-Change Random-Access Memory), Spin Memory claims the Universal Selector enables manufacturers to create 1T1R memory bit cells of 6F2 – 10F2. This would allow manufacturers to embed up to five times more memory in the same area footprint with minimal additional wafer processing costs. MRAM has been an area of focus for Spin Memory since it was founded. MRAM’s primary advantage over DRAM is that MRAM is non-volatile and can lose power without losing data. It’s main disadvantage, prior to today, has been that it is less dense, that is, it can’t store as much data in the same space. While a 6F2 design doesn’t completely close the gap, it does get MRAM chips within shouting distance of current generation DRAM.
Spin Memory plans to share additional technical details about their Universal Selector later this month. On Thursday, August 20, Dr. Kadriye Deniz Bozdag, Spin Memory’s manager of MRAM testing, will give a presentation at Berkeley’s 31st Magnetic Recording Conference.
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