An SSD controller, also referred to as a processor, includes the electronics that bridge the Flash memory components to the SSD input/output interfaces. The controller is an embedded processor that executes firmware-level software. The SSD firmware is device specific, and in most cases can be updated.
An SSD controller, also referred to as a processor, includes the electronics that bridge the Flash memory components to the SSD input/output interfaces. The controller is an embedded processor that executes firmware-level software. The SSD firmware is device specific, and in most cases can be updated.
Mainstream SSD controllers include the following electrical elements, many times contained within a single Integrated Circuit (IC):
- Embedded processor – usually a 32-bit microcontroller
- Electrically Erasable data firmware ROM
- System RAM
- Support for external RAM – usually DDR/DDR2 as SDRAM
- Error Correction Code (ECC) circuitry
- Flash component interface – usually a standard interface such as the Open NAND Flash Interface (ONFI)
- Host electrical interface – usually SATA, USB, SAS, or combination
Although the majority of SSD products on the market use standard Flash components, there are new Flash components available that integrate the ECC and, in some cases, the entire controller function within the Flash chips themselves. For sake of this write-up, we’ll focus on the traditional controller factions as listed above.
Typical SSD Controller elements
The table below describes each of these elements in more detail.
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Controller Elements
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Description
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Usage
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Processor
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16 or 32 bit embedded microcontroller, programmed in C in most cases, and compiled to run on the target CPU engine.
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Execution of firmware for the main Flash application as well as diagnostics (SMART), wear leveling (Garbage collection/TRIM), caching, and security functions.
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Error Correction (ECC)
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A hardware function that appends redundancy bits with each byte stored in order to provide data error detection and correction upon readout.
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The data error detection and correction is performed automatically in the ECC hardware to achieve a data reliability error rate on the order of 1 bit 10E-12.
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Flash Controller
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Contains the addressing, data bus, and control for managing one or more Flash components. A typical SSD controller will manage up to 512GB of Flash.
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Typically the 8-bit Open NAND Flash Interface (ONFI) for standard NAND flash.
Typically can control up to 16 Flash components.
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DRAM Controller
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Contains the addressing, data bus, and control for managing one or more DRAM components. A typical SSD controller can manage up to 256MB of DRAM.
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The DRAM is used mainly as a buffer memory to match the dataflow from the Flash array to the I/O interface. This memory can also be utilized as a data cache to improve overall performance. This requires firmware programming
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I/O interface (i.e.: SATA)
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Contains the native electrical interface per a particular open system standard such as SATA, USB, or SAS. The interface is controlled by the controller firmware driver. Basic addressing and handshaking is done in hardware.
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Some controllers allow data transfer between interfaces, such as USB and SATA, without controller intervention in the data flow.
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Controller Memory
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Comprised of programmed memory (ROM) and scratchpad/buffer RAM tightly coupled to the processor. This memory is used by the controller for program execution and for storing scratchpad values. In some cost constrained applications the RAM acts as the sole data buffer for the SSD.
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Typically is 32-64KB ROM and 128-256KB or RAM.
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Chip Configuration
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Establishes setting for types and speeds of memory parts used, clock inputs, diagnostic I/O, and LED status outputs.
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Varies by vendor.
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General I/O
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General purpose programmable pins available to the application.
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Typically 4-16 pins provided.
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Packaging
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281-pin BGA is common
208-pin LQFP is common
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Commonly Used SSD Controllers
The common SSD controllers on the market as of early 2010 include:
- Indilinx "Barefoot ECO" IDX110MO1
- Indilinx "Barefoot" IDX110M00
- Intel PC29AS21BA0
- JMicron JMF602
- JMicron JMF612
- Marvel 88SS9174-BJP2
- Samsung S3C29RBB01-YK40
- SandForce SF-1200
- SandForce SF-1500
- Toshiba T6UG1XBG
System designers perform a series of trade-offs when selecting a supplier and particular controller for their target product and target market(s).
The trade-offs include:
- Programmatic – cost, schedule, support, warranty, and availability.
- Technical – performance, power, package options, features, scalability, and flexibility.
- Other – commonality, compatibility, documentation, development support, testing, and reputation.
In the process of controller selection, the system designer is also doing the same analysis for the Flash parts and other parts needed in the design. It is an iterative process to find the right combination of suppliers and components to best meet the requirements for the particular product.
Due to proprietary concerns, not all the controller design data is available to the general public over the Internet. There is however a significant amount of application detail that can be learned for each of the SSD controllers on the market by studying their use in existing SSDs.
Reviews on StorageReview.com and elsewhere will help discern the advantages of each controller and its effect on the SSD. These contextual references are important because as critical as the controller is in an SSD's performance, the performance of SSDs can vary between two different vendors even though they use the same exact SSD controller component.
Generally this performance variance is because the two designs used different Flash parts, a different number of Flash parts, a different amount of cache buffer memory, or perhaps used optimized firmware in some way. The point is, the SDD controller is just one part of an overall SSD system design and while it's critical to performance, it's not the only factor to consider when making an SSD buying decision.
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